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Kontakt

Room
4155
Phone
+49 30 84185-428
Email

Projects

Projects as Head

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Chip Design Verification with Constraint Integer Programming

In the design process of integrated circuits and other electronic hardware, a huge amount of time and resources is spent on the verification of the design and the final...

Chip Design Verification with Constraint Integer Programming

Projects as Member

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MODAL-SynLab

A major aim of the Research Campus MODAL is the development and use of mathematical synergies between the individual labs of the network. In this context, the fields of...

MODAL-SynLab
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Optimization of Gas Transport

Natural gas is one of the most important energy sources in Germany and Europe. In recent years, political regulations have led to a strict separation of gas trading and...

Optimization of Gas Transport
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Chip Design Verification with Constraint Integer Programming

In the design process of integrated circuits and other electronic hardware, a huge amount of time and resources is spent on the verification of the design and the final...

Chip Design Verification with Constraint Integer Programming
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Counting Solutions in the Field of Verification

In the last years the formal verification technique "property checking" was used to prove the correctness of microchip designs. This technique checks all possible input...

Counting Solutions in the Field of Verification